summaryrefslogtreecommitdiff
path: root/arch
diff options
context:
space:
mode:
Diffstat (limited to 'arch')
-rw-r--r--arch/i386/bits/signal.h57
-rw-r--r--arch/x32/bits/signal.h69
-rw-r--r--arch/x86_64/bits/signal.h69
3 files changed, 130 insertions, 65 deletions
diff --git a/arch/i386/bits/signal.h b/arch/i386/bits/signal.h
index 1f9085a5..9931ee93 100644
--- a/arch/i386/bits/signal.h
+++ b/arch/i386/bits/signal.h
@@ -7,25 +7,44 @@
#endif
#ifdef _GNU_SOURCE
-#define REG_GS 0
-#define REG_FS 1
-#define REG_ES 2
-#define REG_DS 3
-#define REG_EDI 4
-#define REG_ESI 5
-#define REG_EBP 6
-#define REG_ESP 7
-#define REG_EBX 8
-#define REG_EDX 9
-#define REG_ECX 10
-#define REG_EAX 11
-#define REG_TRAPNO 12
-#define REG_ERR 13
-#define REG_EIP 14
-#define REG_CS 15
-#define REG_EFL 16
-#define REG_UESP 17
-#define REG_SS 18
+enum { REG_GS = 0 };
+#define REG_GS REG_GS
+enum { REG_FS = 1 };
+#define REG_FS REG_FS
+enum { REG_ES = 2 };
+#define REG_ES REG_ES
+enum { REG_DS = 3 };
+#define REG_DS REG_DS
+enum { REG_EDI = 4 };
+#define REG_EDI REG_EDI
+enum { REG_ESI = 5 };
+#define REG_ESI REG_ESI
+enum { REG_EBP = 6 };
+#define REG_EBP REG_EBP
+enum { REG_ESP = 7 };
+#define REG_ESP REG_ESP
+enum { REG_EBX = 8 };
+#define REG_EBX REG_EBX
+enum { REG_EDX = 9 };
+#define REG_EDX REG_EDX
+enum { REG_ECX = 10 };
+#define REG_ECX REG_ECX
+enum { REG_EAX = 11 };
+#define REG_EAX REG_EAX
+enum { REG_TRAPNO = 12 };
+#define REG_TRAPNO REG_TRAPNO
+enum { REG_ERR = 13 };
+#define REG_ERR REG_ERR
+enum { REG_EIP = 14 };
+#define REG_EIP REG_EIP
+enum { REG_CS = 15 };
+#define REG_CS REG_CS
+enum { REG_EFL = 16 };
+#define REG_EFL REG_EFL
+enum { REG_UESP = 17 };
+#define REG_UESP REG_UESP
+enum { REG_SS = 18 };
+#define REG_SS REG_SS
#endif
#if defined(_GNU_SOURCE) || defined(_BSD_SOURCE)
diff --git a/arch/x32/bits/signal.h b/arch/x32/bits/signal.h
index 4c4adf31..097be6f4 100644
--- a/arch/x32/bits/signal.h
+++ b/arch/x32/bits/signal.h
@@ -7,29 +7,52 @@
#endif
#ifdef _GNU_SOURCE
-#define REG_R8 0
-#define REG_R9 1
-#define REG_R10 2
-#define REG_R11 3
-#define REG_R12 4
-#define REG_R13 5
-#define REG_R14 6
-#define REG_R15 7
-#define REG_RDI 8
-#define REG_RSI 9
-#define REG_RBP 10
-#define REG_RBX 11
-#define REG_RDX 12
-#define REG_RAX 13
-#define REG_RCX 14
-#define REG_RSP 15
-#define REG_RIP 16
-#define REG_EFL 17
-#define REG_CSGSFS 18
-#define REG_ERR 19
-#define REG_TRAPNO 20
-#define REG_OLDMASK 21
-#define REG_CR2 22
+enum { REG_R8 = 0 };
+#define REG_R8 REG_R8
+enum { REG_R9 = 1 };
+#define REG_R9 REG_R9
+enum { REG_R10 = 2 };
+#define REG_R10 REG_R10
+enum { REG_R11 = 3 };
+#define REG_R11 REG_R11
+enum { REG_R12 = 4 };
+#define REG_R12 REG_R12
+enum { REG_R13 = 5 };
+#define REG_R13 REG_R13
+enum { REG_R14 = 6 };
+#define REG_R14 REG_R14
+enum { REG_R15 = 7 };
+#define REG_R15 REG_R15
+enum { REG_RDI = 8 };
+#define REG_RDI REG_RDI
+enum { REG_RSI = 9 };
+#define REG_RSI REG_RSI
+enum { REG_RBP = 10 };
+#define REG_RBP REG_RBP
+enum { REG_RBX = 11 };
+#define REG_RBX REG_RBX
+enum { REG_RDX = 12 };
+#define REG_RDX REG_RDX
+enum { REG_RAX = 13 };
+#define REG_RAX REG_RAX
+enum { REG_RCX = 14 };
+#define REG_RCX REG_RCX
+enum { REG_RSP = 15 };
+#define REG_RSP REG_RSP
+enum { REG_RIP = 16 };
+#define REG_RIP REG_RIP
+enum { REG_EFL = 17 };
+#define REG_EFL REG_EFL
+enum { REG_CSGSFS = 18 };
+#define REG_CSGSFS REG_CSGSFS
+enum { REG_ERR = 19 };
+#define REG_ERR REG_ERR
+enum { REG_TRAPNO = 20 };
+#define REG_TRAPNO REG_TRAPNO
+enum { REG_OLDMASK = 21 };
+#define REG_OLDMASK REG_OLDMASK
+enum { REG_CR2 = 22 };
+#define REG_CR2 REG_CR2
#endif
#if defined(_GNU_SOURCE) || defined(_BSD_SOURCE)
diff --git a/arch/x86_64/bits/signal.h b/arch/x86_64/bits/signal.h
index e3c31417..c99317d3 100644
--- a/arch/x86_64/bits/signal.h
+++ b/arch/x86_64/bits/signal.h
@@ -7,29 +7,52 @@
#endif
#ifdef _GNU_SOURCE
-#define REG_R8 0
-#define REG_R9 1
-#define REG_R10 2
-#define REG_R11 3
-#define REG_R12 4
-#define REG_R13 5
-#define REG_R14 6
-#define REG_R15 7
-#define REG_RDI 8
-#define REG_RSI 9
-#define REG_RBP 10
-#define REG_RBX 11
-#define REG_RDX 12
-#define REG_RAX 13
-#define REG_RCX 14
-#define REG_RSP 15
-#define REG_RIP 16
-#define REG_EFL 17
-#define REG_CSGSFS 18
-#define REG_ERR 19
-#define REG_TRAPNO 20
-#define REG_OLDMASK 21
-#define REG_CR2 22
+enum { REG_R8 = 0 };
+#define REG_R8 REG_R8
+enum { REG_R9 = 1 };
+#define REG_R9 REG_R9
+enum { REG_R10 = 2 };
+#define REG_R10 REG_R10
+enum { REG_R11 = 3 };
+#define REG_R11 REG_R11
+enum { REG_R12 = 4 };
+#define REG_R12 REG_R12
+enum { REG_R13 = 5 };
+#define REG_R13 REG_R13
+enum { REG_R14 = 6 };
+#define REG_R14 REG_R14
+enum { REG_R15 = 7 };
+#define REG_R15 REG_R15
+enum { REG_RDI = 8 };
+#define REG_RDI REG_RDI
+enum { REG_RSI = 9 };
+#define REG_RSI REG_RSI
+enum { REG_RBP = 10 };
+#define REG_RBP REG_RBP
+enum { REG_RBX = 11 };
+#define REG_RBX REG_RBX
+enum { REG_RDX = 12 };
+#define REG_RDX REG_RDX
+enum { REG_RAX = 13 };
+#define REG_RAX REG_RAX
+enum { REG_RCX = 14 };
+#define REG_RCX REG_RCX
+enum { REG_RSP = 15 };
+#define REG_RSP REG_RSP
+enum { REG_RIP = 16 };
+#define REG_RIP REG_RIP
+enum { REG_EFL = 17 };
+#define REG_EFL REG_EFL
+enum { REG_CSGSFS = 18 };
+#define REG_CSGSFS REG_CSGSFS
+enum { REG_ERR = 19 };
+#define REG_ERR REG_ERR
+enum { REG_TRAPNO = 20 };
+#define REG_TRAPNO REG_TRAPNO
+enum { REG_OLDMASK = 21 };
+#define REG_OLDMASK REG_OLDMASK
+enum { REG_CR2 = 22 };
+#define REG_CR2 REG_CR2
#endif
#if defined(_GNU_SOURCE) || defined(_BSD_SOURCE)