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authorRich Felker <dalias@aerifal.cx>2012-07-22 18:55:01 -0400
committerRich Felker <dalias@aerifal.cx>2012-07-22 18:55:01 -0400
commitdc046f55bbff5f79d022882723c73a6b9af0bf86 (patch)
tree5dad3839830e12534d77443868a1fc410f898c21 /src/setjmp/mips/longjmp.s
parent75fff40b9b536e0e6847d17ecc076894ca7b7068 (diff)
downloadmusl-dc046f55bbff5f79d022882723c73a6b9af0bf86.tar.gz
add floating point register saving/restoring to mips setjmp/longjmp
also fix the alignment of jmp_buf to meet the abi. linux always emulates fpu on mips if it's not present, so enabling this code unconditionally is "safe" but may be slow. in the long term it may be preferable to find a way to disable it on soft float builds.
Diffstat (limited to 'src/setjmp/mips/longjmp.s')
-rw-r--r--src/setjmp/mips/longjmp.s16
1 files changed, 15 insertions, 1 deletions
diff --git a/src/setjmp/mips/longjmp.s b/src/setjmp/mips/longjmp.s
index 9cf6f8d0..fc8e7260 100644
--- a/src/setjmp/mips/longjmp.s
+++ b/src/setjmp/mips/longjmp.s
@@ -10,7 +10,21 @@ longjmp:
bne $2, $0, 1f
nop
addu $2, $2, 1
-1: lw $ra, 0($4)
+1: lw $8, 48($4)
+ ctc1 $8, $31
+ lwc1 $20, 56($4)
+ lwc1 $21, 60($4)
+ lwc1 $22, 64($4)
+ lwc1 $23, 68($4)
+ lwc1 $24, 72($4)
+ lwc1 $25, 76($4)
+ lwc1 $26, 80($4)
+ lwc1 $27, 84($4)
+ lwc1 $28, 88($4)
+ lwc1 $29, 92($4)
+ lwc1 $30, 96($4)
+ lwc1 $31, 100($4)
+ lw $ra, 0($4)
lw $sp, 4($4)
lw $16, 8($4)
lw $17, 12($4)