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| author | Alex Rønne Petersen <alex@alexrp.com> | 2026-01-16 13:57:40 +0100 |
|---|---|---|
| committer | Rich Felker <dalias@aerifal.cx> | 2026-03-20 13:45:46 -0400 |
| commit | 1969500402bc4f80452e1c066401223a3c998f54 (patch) | |
| tree | d77ce57aa05655e17bdc97d2e968a30677117630 /arch/riscv64/bits | |
| parent | 31b3ce5309ee4fe17e0ed8d45fc141267c3f1781 (diff) | |
| download | musl-1969500402bc4f80452e1c066401223a3c998f54.tar.gz | |
riscv: don't define fenv macros for soft float
As is done for all other soft float ports.
Diffstat (limited to 'arch/riscv64/bits')
| -rw-r--r-- | arch/riscv64/bits/fenv.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/riscv64/bits/fenv.h b/arch/riscv64/bits/fenv.h index 806ec40f..2c126e6b 100644 --- a/arch/riscv64/bits/fenv.h +++ b/arch/riscv64/bits/fenv.h @@ -1,3 +1,7 @@ +#ifdef __riscv_float_abi_soft +#define FE_ALL_EXCEPT 0 +#define FE_TONEAREST 0 +#else #define FE_INVALID 16 #define FE_DIVBYZERO 8 #define FE_OVERFLOW 4 @@ -10,6 +14,7 @@ #define FE_DOWNWARD 2 #define FE_UPWARD 3 #define FE_TOWARDZERO 1 +#endif typedef unsigned int fexcept_t; typedef unsigned int fenv_t; |