|author||Rich Felker <email@example.com>||2014-07-19 15:51:12 -0400|
|committer||Rich Felker <firstname.lastname@example.org>||2014-07-19 15:51:12 -0400|
fix missing barrier instructions in mips atomic asm
previously I had wrongly assumed the ll/sc instructions also provided memory synchronization; apparently they do not. this commit adds sync instructions before and after each atomic operation and changes the atomic store to simply use sync before and after a plain store, rather than a useless compare-and-swap.
Diffstat (limited to 'arch/powerpc/atomic.h')
0 files changed, 0 insertions, 0 deletions