path: root/arch/arm
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authorSzabolcs Nagy <>2016-01-31 16:33:44 +0100
committerRich Felker <>2016-01-31 17:32:56 -0500
commit3b27725385614d44add9351191765181edc3f4c1 (patch)
tree3d50e53cf7b6aaac115186b1f1cdc859d1b2db92 /arch/arm
parent65498f289bded83afb809b24d850647e7c91cd58 (diff)
better a_sc inline asm constraint on aarch64 and arm
"Q" input constraint was used for the written object, instead of "=Q" output constraint. this should not cause problems because "memory" is on the clobber list, but "=Q" better documents the intent and more consistent with the actual asm code. this changes the generated code, because different registers are used, but other than the register names nothing should change.
Diffstat (limited to 'arch/arm')
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/atomic_arch.h b/arch/arm/atomic_arch.h
index 21db6b22..706fa1f2 100644
--- a/arch/arm/atomic_arch.h
+++ b/arch/arm/atomic_arch.h
@@ -16,7 +16,7 @@ static inline int a_ll(volatile int *p)
static inline int a_sc(volatile int *p, int v)
int r;
- __asm__ __volatile__ ("strex %0,%1,%2" : "=&r"(r) : "r"(v), "Q"(*p) : "memory");
+ __asm__ __volatile__ ("strex %0,%2,%1" : "=&r"(r), "=Q"(*p) : "r"(v) : "memory");
return !r;