add or1k (OpenRISC 1000) architecture port

With the exception of a fenv implementation, the port is fully featured.
The port has been tested in or1ksim, the golden reference functional
simulator for OpenRISC 1000.
It passes all libc-test tests (except the math tests that
requires a fenv implementation).

The port assumes an or1k implementation that has support for
atomic instructions (l.lwa/l.swa).

Although it passes all the libc-test tests, the port is still
in an experimental state, and has yet experienced very little
'real-world' use.

1 files changed, 17 insertions, 0 deletions

diff --git a/arch/or1k/pthread_arch.h b/arch/or1k/pthread_arch.h
new file mode 100644
index 00000000..e826997e
--- /dev/null
+++ b/arch/or1k/pthread_arch.h
@@ -0,0 +1,17 @@
+/* or1k use variant I, but with the twist that tp points to the end of TCB */
+static inline struct pthread *__pthread_self()
+{
+#ifdef __clang__
+	char *tp;
+	__asm__ __volatile__ ("l.ori %0, r10, 0" : "=r" (tp) );
+#else
+	register char *tp __asm__("r10");
+#endif
+	return (struct pthread *) (tp - sizeof(struct pthread));
+}
+
+#define TLS_ABOVE_TP
+#define TP_ADJ(p) ((char *)(p) + sizeof(struct pthread))
+
+/* word-offset to 'pc' in mcontext_t */
+#define CANCEL_REG_IP 32