1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
|
#define __SYSCALL_LL_E(x) (x)
#define __SYSCALL_LL_O(x) (x)
static inline long __syscall0(long n)
{
register long r0 __asm__("r0") = n;
register long r3 __asm__("r3");
__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
: "+r"(r0), "=r"(r3)
:: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12");
return r3;
}
static inline long __syscall1(long n, long a)
{
register long r0 __asm__("r0") = n;
register long r3 __asm__("r3") = a;
__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
: "+r"(r0), "+r"(r3)
:: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12");
return r3;
}
static inline long __syscall2(long n, long a, long b)
{
register long r0 __asm__("r0") = n;
register long r3 __asm__("r3") = a;
register long r4 __asm__("r4") = b;
__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
: "+r"(r0), "+r"(r3), "+r"(r4)
:: "memory", "cr0", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12");
return r3;
}
static inline long __syscall3(long n, long a, long b, long c)
{
register long r0 __asm__("r0") = n;
register long r3 __asm__("r3") = a;
register long r4 __asm__("r4") = b;
register long r5 __asm__("r5") = c;
__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5)
:: "memory", "cr0", "r6", "r7", "r8", "r9", "r10", "r11", "r12");
return r3;
}
static inline long __syscall4(long n, long a, long b, long c, long d)
{
register long r0 __asm__("r0") = n;
register long r3 __asm__("r3") = a;
register long r4 __asm__("r4") = b;
register long r5 __asm__("r5") = c;
register long r6 __asm__("r6") = d;
__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6)
:: "memory", "cr0", "r7", "r8", "r9", "r10", "r11", "r12");
return r3;
}
static inline long __syscall5(long n, long a, long b, long c, long d, long e)
{
register long r0 __asm__("r0") = n;
register long r3 __asm__("r3") = a;
register long r4 __asm__("r4") = b;
register long r5 __asm__("r5") = c;
register long r6 __asm__("r6") = d;
register long r7 __asm__("r7") = e;
__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6), "+r"(r7)
:: "memory", "cr0", "r8", "r9", "r10", "r11", "r12");
return r3;
}
static inline long __syscall6(long n, long a, long b, long c, long d, long e, long f)
{
register long r0 __asm__("r0") = n;
register long r3 __asm__("r3") = a;
register long r4 __asm__("r4") = b;
register long r5 __asm__("r5") = c;
register long r6 __asm__("r6") = d;
register long r7 __asm__("r7") = e;
register long r8 __asm__("r8") = f;
__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6), "+r"(r7), "+r"(r8)
:: "memory", "cr0", "r9", "r10", "r11", "r12");
return r3;
}
|