From 1b76ff0767d01df72f692806ee5adee13c67ef88 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Sun, 12 Oct 2025 05:35:19 +0200 Subject: s390x: shuffle register usage in __tls_get_offset to avoid r0 as address This fixes an error in 6af4f25b899e89e4b91f8c197ae5a6ce04bcce7b: The r0 register is special in addressing modes on s390x and is interpreted as constant zero, i.e. lg %r5, 8(%r0) would effectively become lg %r5, 8. So care should be taken to never use r0 as an address register in s390x assembly. --- src/thread/s390x/__tls_get_offset.s | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'src') diff --git a/src/thread/s390x/__tls_get_offset.s b/src/thread/s390x/__tls_get_offset.s index 405f118b..056c9110 100644 --- a/src/thread/s390x/__tls_get_offset.s +++ b/src/thread/s390x/__tls_get_offset.s @@ -1,17 +1,17 @@ .global __tls_get_offset .type __tls_get_offset,%function __tls_get_offset: - ear %r0, %a0 - sllg %r0, %r0, 32 - ear %r0, %a1 + ear %r3, %a0 + sllg %r3, %r3, 32 + ear %r3, %a1 la %r1, 0(%r2, %r12) - lg %r3, 0(%r1) - sllg %r4, %r3, 3 - lg %r5, 8(%r0) + lg %r0, 0(%r1) + sllg %r4, %r0, 3 + lg %r5, 8(%r3) lg %r2, 0(%r4, %r5) ag %r2, 8(%r1) - sgr %r2, %r0 + sgr %r2, %r3 br %r14 -- cgit v1.2.1