From 5972c4a4113e2a4de5edf519faf15296ae1eb3ed Mon Sep 17 00:00:00 2001
From: Rich Felker <dalias@aerifal.cx>
Date: Mon, 18 Apr 2016 05:19:13 +0000
Subject: add mips n32 port (ILP32 ABI for mips64)

based on patch submitted by Jaydeep Patil, with minor changes.
---
 src/fenv/mipsn32/fenv-sf.c |  3 ++
 src/fenv/mipsn32/fenv.S    | 70 ++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 73 insertions(+)
 create mode 100644 src/fenv/mipsn32/fenv-sf.c
 create mode 100644 src/fenv/mipsn32/fenv.S

(limited to 'src/fenv')

diff --git a/src/fenv/mipsn32/fenv-sf.c b/src/fenv/mipsn32/fenv-sf.c
new file mode 100644
index 00000000..4aa3dbf1
--- /dev/null
+++ b/src/fenv/mipsn32/fenv-sf.c
@@ -0,0 +1,3 @@
+#ifdef __mips_soft_float
+#include "../fenv.c"
+#endif
diff --git a/src/fenv/mipsn32/fenv.S b/src/fenv/mipsn32/fenv.S
new file mode 100644
index 00000000..cce6436b
--- /dev/null
+++ b/src/fenv/mipsn32/fenv.S
@@ -0,0 +1,70 @@
+#ifndef __mips_soft_float
+
+.set	noreorder
+.global	feclearexcept
+.type	feclearexcept,@function
+feclearexcept:
+	and	$4, $4, 0x7c
+	cfc1	$5, $31
+	or	$5, $5, $4
+	xor	$5, $5, $4
+	ctc1	$5, $31
+	jr	$ra
+	li	$2, 0
+
+.global feraiseexcept
+.type  feraiseexcept,@function
+feraiseexcept:
+	and	$4, $4, 0x7c
+	cfc1	$5, $31
+	or	$5, $5, $4
+	ctc1	$5, $31
+	jr	$ra
+	li	$2, 0
+
+.global fetestexcept
+.type  fetestexcept,@function
+fetestexcept:
+	and	$4, $4, 0x7c
+	cfc1	$2, $31
+	jr	$ra
+	and	$2, $2, $4
+
+.global fegetround
+.type  fegetround,@function
+fegetround:
+	cfc1	$2, $31
+	jr	$ra
+	andi	$2, $2, 3
+
+.global __fesetround
+.type __fesetround,@function
+__fesetround:
+	cfc1	$5, $31
+	li	$6, -4
+	and	$5, $5, $6
+	or	$5, $5, $4
+	ctc1	$5, $31
+	jr	$ra
+	li	$2, 0
+
+.global fegetenv
+.type  fegetenv,@function
+fegetenv:
+	cfc1	$5, $31
+	sw	$5, 0($4)
+	jr	$ra
+	li	$2, 0
+
+.global fesetenv
+.type  fesetenv,@function
+fesetenv:
+	addiu   $5, $4, 1
+	beq	$5, $0, 1f
+	nop
+	lw	$5, 0($4)
+1:	ctc1	$5, $31
+	jr	$ra
+	li	$2, 0
+
+#endif
-- 
cgit v1.2.1