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path: root/src/ldso/arm/tlsdesc.S
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2018-10-09fix build regression on armhf in tlsdesc asmRich Felker-0/+1
when invoking the assembler, arm gcc does not always pass the right flags to enable use of vfp instruction mnemonics. for C code it produces, it emits the .fpu directive, but this does not help when building asm source files, which tlsdesc needs to be. to fix, use an explicit directive here. commit 0beb9dfbecad38af9759b1e83eeb007e28b70abb introduced this regression. it has not appeared in any release.
2018-10-01inline cp15 thread pointer load in arm dynamic TLSDESC asm when possibleRich Felker-0/+9
the indirect function call is a significant portion of the code path for the dynamic case, and most users are probably building for ISA levels where it can be omitted. we could drop at least one register save/restore (lr) with this change, and possibly another (ip) with some clever shuffling, but it's not clear whether there's a way to do it that's not more expensive, or whether avoiding the save/restore would have any practical effect, so in the interest of avoiding complexity it's omitted for now.
2018-10-01add TLSDESC support for 32-bit armRich Felker-0/+62
unlike other asm where the baseline ISA is used, these functions are hot paths and use ISA-level specializations. call-clobbered vfp registers are saved before calling __tls_get_new, since there is no guarantee it won't use them. while setjmp/longjmp have to use hwcap to decide whether to the fpu is in use, since application code could be using vfp registers even if libc was compiled as pure softfloat, __tls_get_new is part of libc and can be assumed not to have access to vfp registers if tlsdesc.S does not. thus it suffices just to check the predefined preprocessor macros. the check for __ARM_PCS_VFP is redundant; !__SOFTFP__ must always be true if the target ISA level includes fpu instructions/registers.