path: root/arch/microblaze/atomic.h
AgeCommit message (Collapse)AuthorLines
2014-10-10add explicit barrier operation to internal atomic.h APIRich Felker-1/+3
2014-08-25add working a_spin() atomic for non-x86 targetsRich Felker-0/+1
conceptually, a_spin needs to be at least a compiler barrier, so the compiler will not optimize out loops (and the load on each iteration) while spinning. it should also be a memory barrier, or the spinning thread might keep spinning without noticing stores from other threads, thus delaying for longer than it should. ideally, an optimal a_spin implementation that avoids unnecessary cache/memory contention should be chosen for each arch, but for now, the easiest thing is to perform a useless a_cas on the calling thread's stack.
2014-07-27clean up unused and inconsistent atomics in arch dirsRich Felker-5/+0
the a_cas_l, a_swap_l, a_swap_p, and a_store_l operations were probably used a long time ago when only i386 and x86_64 were supported. as other archs were added, support for them was inconsistent, and they are obviously not in use at present. having them around potentially confuses readers working on new ports, and the type-punning hacks and inconsistent use of types in their definitions is not a style I wish to perpetuate in the source tree, so removing them seems appropriate.
2014-07-19fix microblaze atomic storeRich Felker-1/+3
as far as I can tell, microblaze is strongly ordered, but this does not seem to be well-documented and the assumption may need revisiting. even with strong ordering, however, a volatile C assignment is not sufficient to implement atomic store, since it does not preclude reordering by the compiler with respect to non-volatile stores and loads. simply flanking a C store with empty volatile asm blocks with memory clobbers would achieve the desired result, but is likely to result in worse code generation, since the address and value for the store may need to be spilled. actually writing the store in asm, so that there's only one asm block, should give optimal code generation while satisfying the requirement for having a compiler barrier.
2014-07-19remove cruft from microblaze atomic.hRich Felker-13/+0
2013-08-11add missing a_or_l to atomic.h for non-x86 archsRich Felker-0/+5
this is needed for recently committed sigaction code
2012-09-29microblaze portRich Felker-0/+151
based on initial work by rdp, with heavy modifications. some features including threads are untested because qemu app-level emulation seems to be broken and I do not have a proper system image for testing.