path: root/src/thread/arm/__aeabi_read_tp.s
diff options
authorSzabolcs Nagy <>2018-08-24 23:11:59 +0000
committerRich Felker <>2018-08-28 17:08:14 -0400
commit056f9d818eaf1dbe9e9d63b64b109fd9b608fa36 (patch)
treec6b94b438e17f8618275279f62fc56c30052408a /src/thread/arm/__aeabi_read_tp.s
parentcdbbcfb8f5d748f17694a5cc404af4b9381ff95f (diff)
rewrite __aeabi_read_tp in asm
__aeabi_read_tp used to call c code, but that was incorrect as the arm runtime abi specifies special pcs for this function: it is only allowed to clobber r0, ip, lr and cpsr. maintainer's note: the old code explicitly saved and restored all general-purpose registers which are call-clobbered in the normal calling convention, so it's unlikely that any real-world compilers produced code that could break. however theoretically they could have chosen to use floating point registers, in which case the caller's values of those registers would be clobbered.
Diffstat (limited to 'src/thread/arm/__aeabi_read_tp.s')
1 files changed, 6 insertions, 4 deletions
diff --git a/src/thread/arm/__aeabi_read_tp.s b/src/thread/arm/__aeabi_read_tp.s
index 9d0cd311..2585620c 100644
--- a/src/thread/arm/__aeabi_read_tp.s
+++ b/src/thread/arm/__aeabi_read_tp.s
@@ -2,7 +2,9 @@
.global __aeabi_read_tp
.type __aeabi_read_tp,%function
- push {r1,r2,r3,lr}
- bl __aeabi_read_tp_c
- pop {r1,r2,r3,lr}
- bx lr
+ ldr r0,1f
+ add r0,r0,pc
+ ldr r0,[r0]
+2: bx r0
+ .align 2
+1: .word __a_gettp_ptr - 2b