path: root/arch/powerpc/atomic.h
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authorRich Felker <>2014-07-19 18:23:24 -0400
committerRich Felker <>2014-07-28 00:28:01 -0400
commit809f1d3e822988062856a6fd8ec8ca33a6c29932 (patch)
treeae931c6f0636efab3f44dac9613c97671b86b8b4 /arch/powerpc/atomic.h
parent3c548e6eda4b38a579b5bc74af08477304fa376c (diff)
fix microblaze atomic store
as far as I can tell, microblaze is strongly ordered, but this does not seem to be well-documented and the assumption may need revisiting. even with strong ordering, however, a volatile C assignment is not sufficient to implement atomic store, since it does not preclude reordering by the compiler with respect to non-volatile stores and loads. simply flanking a C store with empty volatile asm blocks with memory clobbers would achieve the desired result, but is likely to result in worse code generation, since the address and value for the store may need to be spilled. actually writing the store in asm, so that there's only one asm block, should give optimal code generation while satisfying the requirement for having a compiler barrier. (cherry picked from commit 884cc0c7e253601b96902120ed689f34d12f8aa0)
Diffstat (limited to 'arch/powerpc/atomic.h')
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