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authorRich Felker <dalias@aerifal.cx>2011-02-15 04:00:40 -0500
committerRich Felker <dalias@aerifal.cx>2011-02-15 04:00:40 -0500
commita5bf06c035168122725ec32537f99ab1e6c8432c (patch)
treed0cc20811c663e5b152f158d91baa6b9d04c71d6 /arch/i386/atomic.h
parent7b2dd2235dd0db3a2f71e25d1c0925e0348e1996 (diff)
downloadmusl-a5bf06c035168122725ec32537f99ab1e6c8432c.tar.gz
move arch-specific internal headers into place
Diffstat (limited to 'arch/i386/atomic.h')
-rw-r--r--arch/i386/atomic.h110
1 files changed, 110 insertions, 0 deletions
diff --git a/arch/i386/atomic.h b/arch/i386/atomic.h
new file mode 100644
index 00000000..e74e4535
--- /dev/null
+++ b/arch/i386/atomic.h
@@ -0,0 +1,110 @@
+#ifndef _INTERNAA_ATOMIC_H
+#define _INTERNAA_ATOMIC_H
+
+#include <stdint.h>
+
+static inline int a_ctz_64(uint64_t x)
+{
+ int r;
+ __asm__( "bsf %1,%0 ; jnz 1f ; bsf %2,%0 ; addl $32,%0\n1:"
+ : "=r"(r) : "r"((unsigned)x), "r"((unsigned)(x>>32)) );
+ return r;
+}
+
+
+static inline void a_and_64(volatile uint64_t *p, uint64_t v)
+{
+ __asm__( "lock ; andl %1, (%0) ; lock ; andl %2, 4(%0)"
+ : : "r"((long *)p), "r"((unsigned)v), "r"((unsigned)(v>>32)) : "memory" );
+}
+
+static inline void a_or_64(volatile uint64_t *p, uint64_t v)
+{
+ __asm__( "lock ; orl %1, (%0) ; lock ; orl %2, 4(%0)"
+ : : "r"((long *)p), "r"((unsigned)v), "r"((unsigned)(v>>32)) : "memory" );
+}
+
+static inline void a_store_l(volatile void *p, long x)
+{
+ __asm__( "movl %1, %0" : "=m"(*(long *)p) : "r"(x) : "memory" );
+}
+
+static inline void a_or_l(volatile void *p, long v)
+{
+ __asm__( "lock ; orl %1, %0"
+ : "=m"(*(long *)p) : "r"(v) : "memory" );
+}
+
+static inline void *a_cas_p(volatile void *p, void *t, void *s)
+{
+ __asm__( "lock ; cmpxchg %3, %1"
+ : "=a"(t), "=m"(*(long *)p) : "a"(t), "r"(s) : "memory" );
+ return t;
+}
+
+static inline long a_cas_l(volatile void *p, long t, long s)
+{
+ __asm__( "lock ; cmpxchg %3, %1"
+ : "=a"(t), "=m"(*(long *)p) : "a"(t), "r"(s) : "memory" );
+ return t;
+}
+
+static inline void *a_swap_p(void *volatile *x, void *v)
+{
+ __asm__( "xchg %0, %1" : "=r"(v), "=m"(*(void **)x) : "0"(v) : "memory" );
+ return v;
+}
+static inline long a_swap_l(volatile void *x, long v)
+{
+ __asm__( "xchg %0, %1" : "=r"(v), "=m"(*(long *)x) : "0"(v) : "memory" );
+ return v;
+}
+
+static inline void a_or(volatile void *p, int v)
+{
+ __asm__( "lock ; orl %1, %0"
+ : "=m"(*(int *)p) : "r"(v) : "memory" );
+}
+
+static inline void a_and(volatile void *p, int v)
+{
+ __asm__( "lock ; andl %1, %0"
+ : "=m"(*(int *)p) : "r"(v) : "memory" );
+}
+
+static inline int a_swap(volatile int *x, int v)
+{
+ __asm__( "xchg %0, %1" : "=r"(v), "=m"(*x) : "0"(v) : "memory" );
+ return v;
+}
+
+#define a_xchg a_swap
+
+static inline int a_fetch_add(volatile int *x, int v)
+{
+ __asm__( "lock ; xadd %0, %1" : "=r"(v), "=m"(*x) : "0"(v) : "memory" );
+ return v;
+}
+
+static inline void a_inc(volatile int *x)
+{
+ __asm__( "lock ; incl %0" : "=m"(*x) : "m"(*x) : "memory" );
+}
+
+static inline void a_dec(volatile int *x)
+{
+ __asm__( "lock ; decl %0" : "=m"(*x) : "m"(*x) : "memory" );
+}
+
+static inline void a_store(volatile int *p, int x)
+{
+ __asm__( "movl %1, %0" : "=m"(*p) : "r"(x) : "memory" );
+}
+
+static inline void a_spin()
+{
+ __asm__ __volatile__( "pause" : : : "memory" );
+}
+
+
+#endif