summaryrefslogtreecommitdiff
path: root/arch/x86_64/atomic.h
blob: e74e45352574859ed06fbfea614750068846c623 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
#ifndef _INTERNAA_ATOMIC_H
#define _INTERNAA_ATOMIC_H

#include <stdint.h>

static inline int a_ctz_64(uint64_t x)
{
	int r;
	__asm__( "bsf %1,%0 ; jnz 1f ; bsf %2,%0 ; addl $32,%0\n1:"
		: "=r"(r) : "r"((unsigned)x), "r"((unsigned)(x>>32)) );
	return r;
}


static inline void a_and_64(volatile uint64_t *p, uint64_t v)
{
	__asm__( "lock ; andl %1, (%0) ; lock ; andl %2, 4(%0)"
		: : "r"((long *)p), "r"((unsigned)v), "r"((unsigned)(v>>32)) : "memory" );
}

static inline void a_or_64(volatile uint64_t *p, uint64_t v)
{
	__asm__( "lock ; orl %1, (%0) ; lock ; orl %2, 4(%0)"
		: : "r"((long *)p), "r"((unsigned)v), "r"((unsigned)(v>>32)) : "memory" );
}

static inline void a_store_l(volatile void *p, long x)
{
	__asm__( "movl %1, %0" : "=m"(*(long *)p) : "r"(x) : "memory" );
}

static inline void a_or_l(volatile void *p, long v)
{
	__asm__( "lock ; orl %1, %0"
		: "=m"(*(long *)p) : "r"(v) : "memory" );
}

static inline void *a_cas_p(volatile void *p, void *t, void *s)
{
	__asm__( "lock ; cmpxchg %3, %1"
		: "=a"(t), "=m"(*(long *)p) : "a"(t), "r"(s) : "memory" );
	return t;
}

static inline long a_cas_l(volatile void *p, long t, long s)
{
	__asm__( "lock ; cmpxchg %3, %1"
		: "=a"(t), "=m"(*(long *)p) : "a"(t), "r"(s) : "memory" );
	return t;
}

static inline void *a_swap_p(void *volatile *x, void *v)
{
	__asm__( "xchg %0, %1" : "=r"(v), "=m"(*(void **)x) : "0"(v) : "memory" );
	return v;
}
static inline long a_swap_l(volatile void *x, long v)
{
	__asm__( "xchg %0, %1" : "=r"(v), "=m"(*(long *)x) : "0"(v) : "memory" );
	return v;
}

static inline void a_or(volatile void *p, int v)
{
	__asm__( "lock ; orl %1, %0"
		: "=m"(*(int *)p) : "r"(v) : "memory" );
}

static inline void a_and(volatile void *p, int v)
{
	__asm__( "lock ; andl %1, %0"
		: "=m"(*(int *)p) : "r"(v) : "memory" );
}

static inline int a_swap(volatile int *x, int v)
{
	__asm__( "xchg %0, %1" : "=r"(v), "=m"(*x) : "0"(v) : "memory" );
	return v;
}

#define a_xchg a_swap

static inline int a_fetch_add(volatile int *x, int v)
{
	__asm__( "lock ; xadd %0, %1" : "=r"(v), "=m"(*x) : "0"(v) : "memory" );
	return v;
}

static inline void a_inc(volatile int *x)
{
	__asm__( "lock ; incl %0" : "=m"(*x) : "m"(*x) : "memory" );
}

static inline void a_dec(volatile int *x)
{
	__asm__( "lock ; decl %0" : "=m"(*x) : "m"(*x) : "memory" );
}

static inline void a_store(volatile int *p, int x)
{
	__asm__( "movl %1, %0" : "=m"(*p) : "r"(x) : "memory" );
}

static inline void a_spin()
{
	__asm__ __volatile__( "pause" : : : "memory" );
}


#endif