From 200d15479c0bc48471ee7b8e538ce33af990f82e Mon Sep 17 00:00:00 2001 From: Stefan Kristiansson Date: Thu, 17 Jul 2014 22:09:10 +0300 Subject: add or1k (OpenRISC 1000) architecture port With the exception of a fenv implementation, the port is fully featured. The port has been tested in or1ksim, the golden reference functional simulator for OpenRISC 1000. It passes all libc-test tests (except the math tests that requires a fenv implementation). The port assumes an or1k implementation that has support for atomic instructions (l.lwa/l.swa). Although it passes all the libc-test tests, the port is still in an experimental state, and has yet experienced very little 'real-world' use. --- src/thread/or1k/__unmapself.s | 8 ++++++++ 1 file changed, 8 insertions(+) create mode 100644 src/thread/or1k/__unmapself.s (limited to 'src/thread/or1k/__unmapself.s') diff --git a/src/thread/or1k/__unmapself.s b/src/thread/or1k/__unmapself.s new file mode 100644 index 00000000..6c0fa2ac --- /dev/null +++ b/src/thread/or1k/__unmapself.s @@ -0,0 +1,8 @@ +.global __unmapself +.type __unmapself,@function +__unmapself: + l.ori r11, r0, 215 /* __NR_munmap */ + l.sys 1 + l.ori r3, r0, 0 + l.ori r11, r0, 93 /* __NR_exit */ + l.sys 1 -- cgit v1.2.1