From fc5f16d18222d197ebf182e50048aa384d84269d Mon Sep 17 00:00:00 2001
From: Rich Felker <dalias@aerifal.cx>
Date: Sun, 4 Nov 2012 17:06:31 -0500
Subject: mips cache flush/ctl syscall support and header

---
 include/sys/cachectl.h | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)
 create mode 100644 include/sys/cachectl.h

(limited to 'include')

diff --git a/include/sys/cachectl.h b/include/sys/cachectl.h
new file mode 100644
index 00000000..f3b896a8
--- /dev/null
+++ b/include/sys/cachectl.h
@@ -0,0 +1,22 @@
+#ifndef _SYS_CACHECTL_H
+#define _SYS_CACHECTL_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ICACHE (1<<0)
+#define DCACHE (1<<1)
+#define BCACHE (ICACHE|DCACHE)
+#define CACHEABLE 0
+#define UNCACHEABLE 1
+ 
+int cachectl(void *, int, int);
+int cacheflush(void *, int, int);
+int _flush_cache(void *, int, int);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
-- 
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