From 200d15479c0bc48471ee7b8e538ce33af990f82e Mon Sep 17 00:00:00 2001 From: Stefan Kristiansson Date: Thu, 17 Jul 2014 22:09:10 +0300 Subject: add or1k (OpenRISC 1000) architecture port With the exception of a fenv implementation, the port is fully featured. The port has been tested in or1ksim, the golden reference functional simulator for OpenRISC 1000. It passes all libc-test tests (except the math tests that requires a fenv implementation). The port assumes an or1k implementation that has support for atomic instructions (l.lwa/l.swa). Although it passes all the libc-test tests, the port is still in an experimental state, and has yet experienced very little 'real-world' use. --- arch/or1k/bits/fenv.h | 10 ++++++++++ 1 file changed, 10 insertions(+) create mode 100644 arch/or1k/bits/fenv.h (limited to 'arch/or1k/bits/fenv.h') diff --git a/arch/or1k/bits/fenv.h b/arch/or1k/bits/fenv.h new file mode 100644 index 00000000..edbdea2a --- /dev/null +++ b/arch/or1k/bits/fenv.h @@ -0,0 +1,10 @@ +#define FE_ALL_EXCEPT 0 +#define FE_TONEAREST 0 + +typedef unsigned long fexcept_t; + +typedef struct { + unsigned long __cw; +} fenv_t; + +#define FE_DFL_ENV ((const fenv_t *) -1) -- cgit v1.2.1