From 1315596b510189b5159e742110b504177bdd4932 Mon Sep 17 00:00:00 2001 From: Rich Felker Date: Thu, 21 Jan 2016 19:08:54 +0000 Subject: refactor internal atomic.h rather than having each arch provide its own atomic.h, there is a new shared atomic.h in src/internal which pulls arch-specific definitions from arc/$(ARCH)/atomic_arch.h. the latter can be extremely minimal, defining only a_cas or new ll/sc type primitives which the shared atomic.h will use to construct everything else. this commit avoids making heavy changes to the individual archs' atomic implementations. definitions which are identical or near-identical to what the new shared atomic.h would produce have been removed, but otherwise the changes made are just hooking up the arch-specific files to the new infrastructure. major changes to take advantage of the new system will come in subsequent commits. --- arch/microblaze/atomic.h | 143 ------------------------------------------ arch/microblaze/atomic_arch.h | 53 ++++++++++++++++ 2 files changed, 53 insertions(+), 143 deletions(-) delete mode 100644 arch/microblaze/atomic.h create mode 100644 arch/microblaze/atomic_arch.h (limited to 'arch/microblaze') diff --git a/arch/microblaze/atomic.h b/arch/microblaze/atomic.h deleted file mode 100644 index 93404b94..00000000 --- a/arch/microblaze/atomic.h +++ /dev/null @@ -1,143 +0,0 @@ -#ifndef _INTERNAL_ATOMIC_H -#define _INTERNAL_ATOMIC_H - -#include - -static inline int a_ctz_l(unsigned long x) -{ - static const char debruijn32[32] = { - 0, 1, 23, 2, 29, 24, 19, 3, 30, 27, 25, 11, 20, 8, 4, 13, - 31, 22, 28, 18, 26, 10, 7, 12, 21, 17, 9, 6, 16, 5, 15, 14 - }; - return debruijn32[(x&-x)*0x076be629 >> 27]; -} - -static inline int a_ctz_64(uint64_t x) -{ - uint32_t y = x; - if (!y) { - y = x>>32; - return 32 + a_ctz_l(y); - } - return a_ctz_l(y); -} - -static inline int a_cas(volatile int *p, int t, int s) -{ - register int old, tmp; - __asm__ __volatile__ ( - " addi %0, r0, 0\n" - "1: lwx %0, %2, r0\n" - " rsubk %1, %0, %3\n" - " bnei %1, 1f\n" - " swx %4, %2, r0\n" - " addic %1, r0, 0\n" - " bnei %1, 1b\n" - "1: " - : "=&r"(old), "=&r"(tmp) - : "r"(p), "r"(t), "r"(s) - : "cc", "memory" ); - return old; -} - -static inline void *a_cas_p(volatile void *p, void *t, void *s) -{ - return (void *)a_cas(p, (int)t, (int)s); -} - -static inline int a_swap(volatile int *x, int v) -{ - register int old, tmp; - __asm__ __volatile__ ( - " addi %0, r0, 0\n" - "1: lwx %0, %2, r0\n" - " swx %3, %2, r0\n" - " addic %1, r0, 0\n" - " bnei %1, 1b\n" - "1: " - : "=&r"(old), "=&r"(tmp) - : "r"(x), "r"(v) - : "cc", "memory" ); - return old; -} - -static inline int a_fetch_add(volatile int *x, int v) -{ - register int new, tmp; - __asm__ __volatile__ ( - " addi %0, r0, 0\n" - "1: lwx %0, %2, r0\n" - " addk %0, %0, %3\n" - " swx %0, %2, r0\n" - " addic %1, r0, 0\n" - " bnei %1, 1b\n" - "1: " - : "=&r"(new), "=&r"(tmp) - : "r"(x), "r"(v) - : "cc", "memory" ); - return new-v; -} - -static inline void a_inc(volatile int *x) -{ - a_fetch_add(x, 1); -} - -static inline void a_dec(volatile int *x) -{ - a_fetch_add(x, -1); -} - -static inline void a_store(volatile int *p, int x) -{ - __asm__ __volatile__ ( - "swi %1, %0" - : "=m"(*p) : "r"(x) : "memory" ); -} - -#define a_spin a_barrier - -static inline void a_barrier() -{ - a_cas(&(int){0}, 0, 0); -} - -static inline void a_crash() -{ - *(volatile char *)0=0; -} - -static inline void a_and(volatile int *p, int v) -{ - int old; - do old = *p; - while (a_cas(p, old, old&v) != old); -} - -static inline void a_or(volatile int *p, int v) -{ - int old; - do old = *p; - while (a_cas(p, old, old|v) != old); -} - -static inline void a_or_l(volatile void *p, long v) -{ - a_or(p, v); -} - -static inline void a_and_64(volatile uint64_t *p, uint64_t v) -{ - union { uint64_t v; uint32_t r[2]; } u = { v }; - a_and((int *)p, u.r[0]); - a_and((int *)p+1, u.r[1]); -} - -static inline void a_or_64(volatile uint64_t *p, uint64_t v) -{ - union { uint64_t v; uint32_t r[2]; } u = { v }; - a_or((int *)p, u.r[0]); - a_or((int *)p+1, u.r[1]); -} - -#endif diff --git a/arch/microblaze/atomic_arch.h b/arch/microblaze/atomic_arch.h new file mode 100644 index 00000000..1152e8cd --- /dev/null +++ b/arch/microblaze/atomic_arch.h @@ -0,0 +1,53 @@ +#define a_cas a_cas +static inline int a_cas(volatile int *p, int t, int s) +{ + register int old, tmp; + __asm__ __volatile__ ( + " addi %0, r0, 0\n" + "1: lwx %0, %2, r0\n" + " rsubk %1, %0, %3\n" + " bnei %1, 1f\n" + " swx %4, %2, r0\n" + " addic %1, r0, 0\n" + " bnei %1, 1b\n" + "1: " + : "=&r"(old), "=&r"(tmp) + : "r"(p), "r"(t), "r"(s) + : "cc", "memory" ); + return old; +} + +#define a_swap a_swap +static inline int a_swap(volatile int *x, int v) +{ + register int old, tmp; + __asm__ __volatile__ ( + " addi %0, r0, 0\n" + "1: lwx %0, %2, r0\n" + " swx %3, %2, r0\n" + " addic %1, r0, 0\n" + " bnei %1, 1b\n" + "1: " + : "=&r"(old), "=&r"(tmp) + : "r"(x), "r"(v) + : "cc", "memory" ); + return old; +} + +#define a_fetch_add a_fetch_add +static inline int a_fetch_add(volatile int *x, int v) +{ + register int new, tmp; + __asm__ __volatile__ ( + " addi %0, r0, 0\n" + "1: lwx %0, %2, r0\n" + " addk %0, %0, %3\n" + " swx %0, %2, r0\n" + " addic %1, r0, 0\n" + " bnei %1, 1b\n" + "1: " + : "=&r"(new), "=&r"(tmp) + : "r"(x), "r"(v) + : "cc", "memory" ); + return new-v; +} -- cgit v1.2.1