diff options
| -rw-r--r-- | arch/aarch64/bits/hwcap.h | 11 | ||||
| -rw-r--r-- | arch/arm/bits/hwcap.h | 29 | ||||
| -rw-r--r-- | arch/generic/bits/hwcap.h | 0 | ||||
| -rw-r--r-- | arch/mips/bits/hwcap.h | 2 | ||||
| -rw-r--r-- | arch/mips64/bits/hwcap.h | 2 | ||||
| -rw-r--r-- | arch/mipsn32/bits/hwcap.h | 2 | ||||
| -rw-r--r-- | arch/powerpc/bits/hwcap.h | 40 | ||||
| -rw-r--r-- | arch/powerpc64/bits/hwcap.h | 40 | ||||
| -rw-r--r-- | arch/sh/bits/hwcap.h | 11 | ||||
| -rw-r--r-- | include/sys/auxv.h | 1 |
10 files changed, 138 insertions, 0 deletions
diff --git a/arch/aarch64/bits/hwcap.h b/arch/aarch64/bits/hwcap.h new file mode 100644 index 00000000..2b923f71 --- /dev/null +++ b/arch/aarch64/bits/hwcap.h @@ -0,0 +1,11 @@ +#define HWCAP_FP (1 << 0) +#define HWCAP_ASIMD (1 << 1) +#define HWCAP_EVTSTRM (1 << 2) +#define HWCAP_AES (1 << 3) +#define HWCAP_PMULL (1 << 4) +#define HWCAP_SHA1 (1 << 5) +#define HWCAP_SHA2 (1 << 6) +#define HWCAP_CRC32 (1 << 7) +#define HWCAP_ATOMICS (1 << 8) +#define HWCAP_FPHP (1 << 9) +#define HWCAP_ASIMDHP (1 << 10) diff --git a/arch/arm/bits/hwcap.h b/arch/arm/bits/hwcap.h new file mode 100644 index 00000000..ac4edeac --- /dev/null +++ b/arch/arm/bits/hwcap.h @@ -0,0 +1,29 @@ +#define HWCAP_SWP (1 << 0) +#define HWCAP_HALF (1 << 1) +#define HWCAP_THUMB (1 << 2) +#define HWCAP_26BIT (1 << 3) +#define HWCAP_FAST_MULT (1 << 4) +#define HWCAP_FPA (1 << 5) +#define HWCAP_VFP (1 << 6) +#define HWCAP_EDSP (1 << 7) +#define HWCAP_JAVA (1 << 8) +#define HWCAP_IWMMXT (1 << 9) +#define HWCAP_CRUNCH (1 << 10) +#define HWCAP_THUMBEE (1 << 11) +#define HWCAP_NEON (1 << 12) +#define HWCAP_VFPv3 (1 << 13) +#define HWCAP_VFPv3D16 (1 << 14) +#define HWCAP_TLS (1 << 15) +#define HWCAP_VFPv4 (1 << 16) +#define HWCAP_IDIVA (1 << 17) +#define HWCAP_IDIVT (1 << 18) +#define HWCAP_VFPD32 (1 << 19) +#define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT) +#define HWCAP_LPAE (1 << 20) +#define HWCAP_EVTSTRM (1 << 21) + +#define HWCAP2_AES (1 << 0) +#define HWCAP2_PMULL (1 << 1) +#define HWCAP2_SHA1 (1 << 2) +#define HWCAP2_SHA2 (1 << 3) +#define HWCAP2_CRC32 (1 << 4) diff --git a/arch/generic/bits/hwcap.h b/arch/generic/bits/hwcap.h new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/arch/generic/bits/hwcap.h diff --git a/arch/mips/bits/hwcap.h b/arch/mips/bits/hwcap.h new file mode 100644 index 00000000..05cffba4 --- /dev/null +++ b/arch/mips/bits/hwcap.h @@ -0,0 +1,2 @@ +#define HWCAP_MIPS_R6 (1 << 0) +#define HWCAP_MIPS_MSA (1 << 1) diff --git a/arch/mips64/bits/hwcap.h b/arch/mips64/bits/hwcap.h new file mode 100644 index 00000000..05cffba4 --- /dev/null +++ b/arch/mips64/bits/hwcap.h @@ -0,0 +1,2 @@ +#define HWCAP_MIPS_R6 (1 << 0) +#define HWCAP_MIPS_MSA (1 << 1) diff --git a/arch/mipsn32/bits/hwcap.h b/arch/mipsn32/bits/hwcap.h new file mode 100644 index 00000000..05cffba4 --- /dev/null +++ b/arch/mipsn32/bits/hwcap.h @@ -0,0 +1,2 @@ +#define HWCAP_MIPS_R6 (1 << 0) +#define HWCAP_MIPS_MSA (1 << 1) diff --git a/arch/powerpc/bits/hwcap.h b/arch/powerpc/bits/hwcap.h new file mode 100644 index 00000000..82c92a93 --- /dev/null +++ b/arch/powerpc/bits/hwcap.h @@ -0,0 +1,40 @@ +#define PPC_FEATURE_32 0x80000000 +#define PPC_FEATURE_64 0x40000000 +#define PPC_FEATURE_601_INSTR 0x20000000 +#define PPC_FEATURE_HAS_ALTIVEC 0x10000000 +#define PPC_FEATURE_HAS_FPU 0x08000000 +#define PPC_FEATURE_HAS_MMU 0x04000000 +#define PPC_FEATURE_HAS_4xxMAC 0x02000000 +#define PPC_FEATURE_UNIFIED_CACHE 0x01000000 +#define PPC_FEATURE_HAS_SPE 0x00800000 +#define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000 +#define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000 +#define PPC_FEATURE_NO_TB 0x00100000 +#define PPC_FEATURE_POWER4 0x00080000 +#define PPC_FEATURE_POWER5 0x00040000 +#define PPC_FEATURE_POWER5_PLUS 0x00020000 +#define PPC_FEATURE_CELL 0x00010000 +#define PPC_FEATURE_BOOKE 0x00008000 +#define PPC_FEATURE_SMT 0x00004000 +#define PPC_FEATURE_ICACHE_SNOOP 0x00002000 +#define PPC_FEATURE_ARCH_2_05 0x00001000 +#define PPC_FEATURE_PA6T 0x00000800 +#define PPC_FEATURE_HAS_DFP 0x00000400 +#define PPC_FEATURE_POWER6_EXT 0x00000200 +#define PPC_FEATURE_ARCH_2_06 0x00000100 +#define PPC_FEATURE_HAS_VSX 0x00000080 +#define PPC_FEATURE_PSERIES_PERFMON_COMPAT 0x00000040 + +#define PPC_FEATURE_TRUE_LE 0x00000002 +#define PPC_FEATURE_PPC_LE 0x00000001 + +#define PPC_FEATURE2_ARCH_2_07 0x80000000 +#define PPC_FEATURE2_HTM 0x40000000 +#define PPC_FEATURE2_DSCR 0x20000000 +#define PPC_FEATURE2_EBB 0x10000000 +#define PPC_FEATURE2_ISEL 0x08000000 +#define PPC_FEATURE2_TAR 0x04000000 +#define PPC_FEATURE2_VEC_CRYPTO 0x02000000 +#define PPC_FEATURE2_HTM_NOSC 0x01000000 +#define PPC_FEATURE2_ARCH_3_00 0x00800000 +#define PPC_FEATURE2_HAS_IEEE128 0x00400000 diff --git a/arch/powerpc64/bits/hwcap.h b/arch/powerpc64/bits/hwcap.h new file mode 100644 index 00000000..82c92a93 --- /dev/null +++ b/arch/powerpc64/bits/hwcap.h @@ -0,0 +1,40 @@ +#define PPC_FEATURE_32 0x80000000 +#define PPC_FEATURE_64 0x40000000 +#define PPC_FEATURE_601_INSTR 0x20000000 +#define PPC_FEATURE_HAS_ALTIVEC 0x10000000 +#define PPC_FEATURE_HAS_FPU 0x08000000 +#define PPC_FEATURE_HAS_MMU 0x04000000 +#define PPC_FEATURE_HAS_4xxMAC 0x02000000 +#define PPC_FEATURE_UNIFIED_CACHE 0x01000000 +#define PPC_FEATURE_HAS_SPE 0x00800000 +#define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000 +#define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000 +#define PPC_FEATURE_NO_TB 0x00100000 +#define PPC_FEATURE_POWER4 0x00080000 +#define PPC_FEATURE_POWER5 0x00040000 +#define PPC_FEATURE_POWER5_PLUS 0x00020000 +#define PPC_FEATURE_CELL 0x00010000 +#define PPC_FEATURE_BOOKE 0x00008000 +#define PPC_FEATURE_SMT 0x00004000 +#define PPC_FEATURE_ICACHE_SNOOP 0x00002000 +#define PPC_FEATURE_ARCH_2_05 0x00001000 +#define PPC_FEATURE_PA6T 0x00000800 +#define PPC_FEATURE_HAS_DFP 0x00000400 +#define PPC_FEATURE_POWER6_EXT 0x00000200 +#define PPC_FEATURE_ARCH_2_06 0x00000100 +#define PPC_FEATURE_HAS_VSX 0x00000080 +#define PPC_FEATURE_PSERIES_PERFMON_COMPAT 0x00000040 + +#define PPC_FEATURE_TRUE_LE 0x00000002 +#define PPC_FEATURE_PPC_LE 0x00000001 + +#define PPC_FEATURE2_ARCH_2_07 0x80000000 +#define PPC_FEATURE2_HTM 0x40000000 +#define PPC_FEATURE2_DSCR 0x20000000 +#define PPC_FEATURE2_EBB 0x10000000 +#define PPC_FEATURE2_ISEL 0x08000000 +#define PPC_FEATURE2_TAR 0x04000000 +#define PPC_FEATURE2_VEC_CRYPTO 0x02000000 +#define PPC_FEATURE2_HTM_NOSC 0x01000000 +#define PPC_FEATURE2_ARCH_3_00 0x00800000 +#define PPC_FEATURE2_HAS_IEEE128 0x00400000 diff --git a/arch/sh/bits/hwcap.h b/arch/sh/bits/hwcap.h new file mode 100644 index 00000000..f85121d0 --- /dev/null +++ b/arch/sh/bits/hwcap.h @@ -0,0 +1,11 @@ +#define CPU_HAS_FPU 0x0001 +#define CPU_HAS_P2_FLUSH_BUG 0x0002 +#define CPU_HAS_MMU_PAGE_ASSOC 0x0004 +#define CPU_HAS_DSP 0x0008 +#define CPU_HAS_PERF_COUNTER 0x0010 +#define CPU_HAS_PTEA 0x0020 +#define CPU_HAS_LLSC 0x0040 +#define CPU_HAS_L2_CACHE 0x0080 +#define CPU_HAS_OP32 0x0100 +#define CPU_HAS_PTEAEX 0x0200 +#define CPU_HAS_CAS_L 0x0400 diff --git a/include/sys/auxv.h b/include/sys/auxv.h index 6dcf9adc..ddccf57f 100644 --- a/include/sys/auxv.h +++ b/include/sys/auxv.h @@ -6,6 +6,7 @@ extern "C" { #endif #include <elf.h> +#include <bits/hwcap.h> unsigned long getauxval(unsigned long); |