path: root/src/setjmp/or1k/longjmp.s
diff options
authorStefan Kristiansson <>2014-07-17 22:09:10 +0300
committerRich Felker <>2014-07-18 14:10:23 -0400
commit200d15479c0bc48471ee7b8e538ce33af990f82e (patch)
tree864cc38895b9277384ed3a956f4ad324de2c4455 /src/setjmp/or1k/longjmp.s
parent7bece9c2095ee81f14b1088f6b0ba2f37fecb283 (diff)
add or1k (OpenRISC 1000) architecture port
With the exception of a fenv implementation, the port is fully featured. The port has been tested in or1ksim, the golden reference functional simulator for OpenRISC 1000. It passes all libc-test tests (except the math tests that requires a fenv implementation). The port assumes an or1k implementation that has support for atomic instructions (l.lwa/l.swa). Although it passes all the libc-test tests, the port is still in an experimental state, and has yet experienced very little 'real-world' use.
Diffstat (limited to 'src/setjmp/or1k/longjmp.s')
1 files changed, 25 insertions, 0 deletions
diff --git a/src/setjmp/or1k/longjmp.s b/src/setjmp/or1k/longjmp.s
new file mode 100644
index 00000000..1db9fd93
--- /dev/null
+++ b/src/setjmp/or1k/longjmp.s
@@ -0,0 +1,25 @@ _longjmp longjmp
+.type _longjmp,@function
+.type longjmp,@function
+ l.sfeqi r4, 0
+ l.bnf 1f
+ l.addi r11, r4,0
+ l.ori r11, r0, 1
+1: l.lwz r1, 0(r3)
+ l.lwz r2, 4(r3)
+ l.lwz r9, 8(r3)
+ l.lwz r10, 12(r3)
+ l.lwz r14, 16(r3)
+ l.lwz r16, 20(r3)
+ l.lwz r18, 24(r3)
+ l.lwz r20, 28(r3)
+ l.lwz r22, 32(r3)
+ l.lwz r24, 36(r3)
+ l.lwz r26, 40(r3)
+ l.lwz r28, 44(r3)
+ l.lwz r30, 48(r3)
+ l.jr r9
+ l.nop