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authorRich Felker <dalias@aerifal.cx>2019-05-24 10:46:08 -0400
committerRich Felker <dalias@aerifal.cx>2019-06-14 17:13:05 -0400
commit0a48860c27a8eb291bcc7616ea9eb073dc660cab (patch)
tree6021d6d18943d7b883e38e2f3e20a3b81d916fc5 /arch/riscv64/reloc.h
parent5fc43798250255455e4b5f9b08000bd3102274d9 (diff)
downloadmusl-0a48860c27a8eb291bcc7616ea9eb073dc660cab.tar.gz
add riscv64 architecture support
Author: Alex Suykov <alex.suykov@gmail.com> Author: Aric Belsito <lluixhi@gmail.com> Author: Drew DeVault <sir@cmpwn.com> Author: Michael Clark <mjc@sifive.com> Author: Michael Forney <mforney@mforney.org> Author: Stefan O'Rear <sorear2@gmail.com> This port has involved the work of many people over several years. I have tried to ensure that everyone with substantial contributions has been credited above; if any omissions are found they will be noted later in an update to the authors/contributors list in the COPYRIGHT file. The version committed here comes from the riscv/riscv-musl repo's commit 3fe7e2c75df78eef42dcdc352a55757729f451e2, with minor changes by me for issues found during final review: - a_ll/a_sc atomics are removed (according to the ISA spec, lr/sc are not safe to use in separate inline asm fragments) - a_cas[_p] is fixed to be a memory barrier - the call from the _start assembly into the C part of crt1/ldso is changed to allow for the possibility that the linker does not place them nearby each other. - DTP_OFFSET is defined correctly so that local-dynamic TLS works - reloc.h LDSO_ARCH logic is simplified and made explicit. - unused, non-functional crti/n asm files are removed. - an empty .sdata section is added to crt1 so that the __global_pointer reference is resolvable. - indentation style errors in some asm files are fixed.
Diffstat (limited to 'arch/riscv64/reloc.h')
-rw-r--r--arch/riscv64/reloc.h22
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/riscv64/reloc.h b/arch/riscv64/reloc.h
new file mode 100644
index 00000000..1ca13811
--- /dev/null
+++ b/arch/riscv64/reloc.h
@@ -0,0 +1,22 @@
+#if defined __riscv_float_abi_soft
+#define RISCV_FP_SUFFIX "-sf"
+#elif defined __riscv_float_abi_single
+#define RISCV_FP_SUFFIX "-sp"
+#elif defined __riscv_float_abi_double
+#define RISCV_FP_SUFFIX ""
+#endif
+
+#define LDSO_ARCH "riscv64" RISCV_FP_SUFFIX
+
+#define TPOFF_K 0
+
+#define REL_SYMBOLIC R_RISCV_64
+#define REL_PLT R_RISCV_JUMP_SLOT
+#define REL_RELATIVE R_RISCV_RELATIVE
+#define REL_COPY R_RISCV_COPY
+#define REL_DTPMOD R_RISCV_TLS_DTPMOD64
+#define REL_DTPOFF R_RISCV_TLS_DTPREL64
+#define REL_TPOFF R_RISCV_TLS_TPREL64
+
+#define CRTJMP(pc,sp) __asm__ __volatile__( \
+ "mv sp, %1 ; jr %0" : : "r"(pc), "r"(sp) : "memory" )