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authorRich Felker <dalias@aerifal.cx>2012-09-15 02:22:10 -0400
committerRich Felker <dalias@aerifal.cx>2012-09-15 02:22:10 -0400
commit4221f154ff29ab0d6be1e7beaa5ea2d1731bc58e (patch)
tree2e49b4004e1ee7c220c26108ece8524505bf4297 /arch/mips
parentafd209deb7d3bfc9cc31713e2cb8f22693ca6fae (diff)
downloadmusl-4221f154ff29ab0d6be1e7beaa5ea2d1731bc58e.tar.gz
fix buggy constraints in mips inline syscall asm
if same register is used for input/output, the compiler must be told. otherwise is generates random junk code that clobbers the result. in pure syscall-wrapper functions, nothing went wrong, but in more complex functions where register allocation is non-trivial, things broke badly.
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/syscall_arch.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/syscall_arch.h b/arch/mips/syscall_arch.h
index b1e68ffb..7c7f9a1a 100644
--- a/arch/mips/syscall_arch.h
+++ b/arch/mips/syscall_arch.h
@@ -11,7 +11,7 @@
register long r2 __asm__("$2"); \
__asm__ __volatile__ ( \
"addu $2,$0,%2 ; syscall" \
- : "=&r"(r2), "=r"(r7) : "ir"(n), __VA_ARGS__, "r"(r2) \
+ : "=&r"(r2), "=r"(r7) : "ir"(n), __VA_ARGS__, "0"(r2), "1"(r7) \
: "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13", \
"$14", "$15", "$24", "$25", "hi", "lo", "memory"); \
return r7 ? -r2 : r2; \
@@ -53,7 +53,7 @@ static inline long __syscall4(long n, long a, long b, long c, long d)
register long r5 __asm__("$5") = b;
register long r6 __asm__("$6") = c;
register long r7 __asm__("$7") = d;
- __asm_syscall("r"(r4), "r"(r5), "r"(r6), "r"(r7));
+ __asm_syscall("r"(r4), "r"(r5), "r"(r6));
}
#else