musl/src/math/powerpc, branch master musl - an implementation of the standard library for Linux-based systems add SPE FPU support to powerpc-sf 2021-09-23T23:11:46+00:00 Rich Felker dalias@aerifal.cx 2021-09-23T23:11:46+00:00 7be59733d71ada3a32a98622507399253f1d5e48 When the soft-float ABI for PowerPC was added in commit 5a92dd95c77cee81755f1a441ae0b71e3ae2bcdb, with Freescale cpus using the alternative SPE FPU as the main use case, it was noted that we could probably support hard float on them, but that it would involve determining some difficult ABI constraints. This commit is the completion of that work. The Power-Arch-32 ABI supplement defines the ABI profiles, and indeed ATR-SPE is built on ATR-SOFT-FLOAT. But setjmp/longjmp compatibility are problematic for the same reason they're problematic on ARM, where optional float-related parts of the register file are "call-saved if present". This requires testing __hwcap, which is now done. In keeping with the existing powerpc-sf subarch definition, which did not have fenv, the fenv macros are not defined for SPE and the SPEFSCR control register is left (and assumed to start in) the default mode. 
When the soft-float ABI for PowerPC was added in commit
5a92dd95c77cee81755f1a441ae0b71e3ae2bcdb, with Freescale cpus using
the alternative SPE FPU as the main use case, it was noted that we
could probably support hard float on them, but that it would involve
determining some difficult ABI constraints. This commit is the
completion of that work.

The Power-Arch-32 ABI supplement defines the ABI profiles, and indeed
ATR-SPE is built on ATR-SOFT-FLOAT. But setjmp/longjmp compatibility
are problematic for the same reason they're problematic on ARM, where
optional float-related parts of the register file are "call-saved if
present". This requires testing __hwcap, which is now done.

In keeping with the existing powerpc-sf subarch definition, which did
not have fenv, the fenv macros are not defined for SPE and the SPEFSCR
control register is left (and assumed to start in) the default mode.
ppc: add configure check for older compilers erroring on 'd' constraint 2019-11-06T02:48:31+00:00 rofl0r rofl0r@users.noreply.github.com 2019-11-05T21:01:42+00:00 66d1e31292a8c05d172872fe73880ca6d3b68104 






powerpc: add single instruction fabs, fabsf, fma, fmaf, sqrt, sqrtf
2018-10-15T18:41:59+00:00

Szabolcs Nagy
nsz@port70.net

2018-09-20T23:14:11+00:00

7c5f3bb955123ba65bbdedee0e4499ef78a5747c

These are only available on hard float target and sqrt is not available
in the base ISA, so further check is used.





These are only available on hard float target and sqrt is not available
in the base ISA, so further check is used.