musl/src/fenv/powerpc, branch master musl - an implementation of the standard library for Linux-based systems add SPE FPU support to powerpc-sf 2021-09-23T23:11:46+00:00 Rich Felker dalias@aerifal.cx 2021-09-23T23:11:46+00:00 7be59733d71ada3a32a98622507399253f1d5e48 When the soft-float ABI for PowerPC was added in commit 5a92dd95c77cee81755f1a441ae0b71e3ae2bcdb, with Freescale cpus using the alternative SPE FPU as the main use case, it was noted that we could probably support hard float on them, but that it would involve determining some difficult ABI constraints. This commit is the completion of that work. The Power-Arch-32 ABI supplement defines the ABI profiles, and indeed ATR-SPE is built on ATR-SOFT-FLOAT. But setjmp/longjmp compatibility are problematic for the same reason they're problematic on ARM, where optional float-related parts of the register file are "call-saved if present". This requires testing __hwcap, which is now done. In keeping with the existing powerpc-sf subarch definition, which did not have fenv, the fenv macros are not defined for SPE and the SPEFSCR control register is left (and assumed to start in) the default mode. 
When the soft-float ABI for PowerPC was added in commit
5a92dd95c77cee81755f1a441ae0b71e3ae2bcdb, with Freescale cpus using
the alternative SPE FPU as the main use case, it was noted that we
could probably support hard float on them, but that it would involve
determining some difficult ABI constraints. This commit is the
completion of that work.

The Power-Arch-32 ABI supplement defines the ABI profiles, and indeed
ATR-SPE is built on ATR-SOFT-FLOAT. But setjmp/longjmp compatibility
are problematic for the same reason they're problematic on ARM, where
optional float-related parts of the register file are "call-saved if
present". This requires testing __hwcap, which is now done.

In keeping with the existing powerpc-sf subarch definition, which did
not have fenv, the fenv macros are not defined for SPE and the SPEFSCR
control register is left (and assumed to start in) the default mode.
make arch __fesetround backends hidden 2018-09-12T18:34:32+00:00 Rich Felker dalias@aerifal.cx 2018-09-10T19:51:44+00:00 039f1b3c564667ab6fc9955bd892c2e527eb80b0 these are not public interfaces and do not match the public function, but delegate argument checking to it. 
these are not public interfaces and do not match the public function,
but delegate argument checking to it.
add powerpc soft-float support 2016-03-06T22:03:01+00:00 Felix Fietkau nbd@openwrt.org 2016-01-25T12:20:52+00:00 5a92dd95c77cee81755f1a441ae0b71e3ae2bcdb Some PowerPC CPUs (e.g. Freescale MPC85xx) have a completely different instruction set for floating point operations (SPE). Executing regular PowerPC floating point instructions results in "Illegal instruction" errors. Make it possible to run these devices in soft-float mode. 
Some PowerPC CPUs (e.g. Freescale MPC85xx) have a completely different
instruction set for floating point operations (SPE).
Executing regular PowerPC floating point instructions results in
"Illegal instruction" errors.

Make it possible to run these devices in soft-float mode.
fix invalid instruction mnemonics in powerpc fenv asm 2013-08-27T22:54:46+00:00 Rich Felker dalias@aerifal.cx 2013-08-27T22:54:46+00:00 ebc87349fef4f460abc3991c58f38d76c309bc6b there is no non-dot version of the andis instruction, but there's no harm in updating the flags anyway, so just use the dot version. 
there is no non-dot version of the andis instruction, but there's no
harm in updating the flags anyway, so just use the dot version.
fix fenv exception functions to mask their argument 2013-08-18T20:08:18+00:00 Szabolcs Nagy nsz@port70.net 2013-08-18T20:08:18+00:00 a6b0170a7f51fdea9beec57ae794221290af232b fesetround.c is a wrapper to do the arch independent argument check (on archs where rounding mode is not stored in 2 bits __fesetround still has to check its arguments) on powerpc fe*except functions do not accept the extra invalid flags of its fpscr register the useless FENV_ACCESS pragma was removed from feupdateenv 
fesetround.c is a wrapper to do the arch independent argument
check (on archs where rounding mode is not stored in 2 bits
__fesetround still has to check its arguments)

on powerpc fe*except functions do not accept the extra invalid
flags of its fpscr register

the useless FENV_ACCESS pragma was removed from feupdateenv
fenv support for ppc, untested 2012-11-18T21:31:14+00:00 Rich Felker dalias@aerifal.cx 2012-11-18T21:31:14+00:00 75c450cff34b5206aca6aab14b7ad909168b8f50 based on code sent to the mailing list by nsz, with minor changes. 
based on code sent to the mailing list by nsz, with minor changes.